Pokey Module Status

Layout finished for the Pokey module main board prototype a month or so ago, and this past Monday two bare PCBs came in. My weeknights have been spent soldering parts and testing power supplies. There are five power rails for running the digital and analog stuff combined. When I was looking at Altera FPGAs, it looked like the design would need seven, but Xilinx parts are more forgiving. I wanted to use a Xilinx Spartan 6, but those are only available in BGA format (ie, impossible to solder by hand) until August. I settled on a Spartan 3A part.

Parts Parts Parts

The Soldering Zone

Anyway, this is just a rambling status update. The power supplies are doing what they should and nothing is getting hot. The first audio spewed forth last night, and here’s a clip of what that sounded like:

Click here for a .wav

It’s the same test code I used in this post, just migrated to a Xilinx FPGA and self-contained. It’s good to see that it’s working on a standalone module now instead of just on a dev board. Progress!

Knobs n Lights n Stuff

Knobs 'n' Lights 'n' Stuff

The three LEDs show “pitch clipping” and whether or not the aux input is available. The pitch inputs take -5 to +5, giving a 10 octave CV span. Since the Atari chip is somewhat limited in its frequency response, there are LEDs to show when the requested pitch is either too high or too low for the chip to handle. There’s a switch on the PCB that lets you control if a clipping channel should either mute or just play its most extreme frequency. Muting is useful for keeping chords in tune.

My next step is to get the A/D converters talking. I’m shooting for at least a 30 kHz sample rate on each of the Pitch and Volume CV inputs. That means pitch input 1 will be updated at least 30k times a second, pitch input 2 will be updated at least 30k times a second, and so on. The finalized sample rates, along with other tech specs like input impedance, will be in the manual.

In terms of overall time frame, I ordered 1000 potentiometers in early May. They take 12-14 weeks to get, putting actual release of the Pokey module in the range of August/September. The FPGA code is currently about 25% complete. Bifurcating technobabble flux capacitor.

One Response to “Pokey Module Status”

  1. TRUE CHIP TILL DEATH • TCTD Links for 2010-05-25 Says:

    [...] pokey module updates: http://skrasoft.com/blog/?p=239 7 hrs [...]

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