Pokey Oscillator Aliasing

While waiting to hear back from Xilinx on some FPGA questions, I started a legitimate FPGA emulation of a Pokey chip. The sound generation hardware is, from what I can tell, completely digital up to the D/A converters. The outputs from different channels on a real chip modulate each other in the analog world, but it should be possible to get most of the way there in an FPGA.

My favorite “problem” with the Pokey is that the same frequency settings at two different times can create different sounds or even go from sound to silence. This happens because the noise generators run at very high speeds, but they are “sampled” by lower speed clocks to generate the output. The net result is 1-bit aliasing that creates predictably unpredictable results.

Obviously any true hardware emulation should have the same problems, so I put together some Verilog based on my current understanding of how the Pokey internals work. If my understanding is correct, I should be able to create patterns from one frequency value that give different timbres or even silence.

For the sake of brevity: it worked! I simulated the engine running with different frequency values until I found frequency values where a low speed clock synchronized with a pattern in the higher speed noise generators. By then jumping to a different frequency and back, the phase of this synchronization shifts and the output pattern changes timbre.

First is an extremely wide output shot from a logic simulation. “N” is the frequency register setting (AUDF in the Pokey datasheet). Several output configurations are shown as the bottom three lines. Notice that N is 3 most of the time, but the shape of T_4_OUT changes each time N jumps to 100 and back.

Sync In, Sync Out

Sync In, Sync Out

Click the image for a full-scale version.

Next is the money shot. There had to be a case where an output could “disappear” by grabbing a pattern of all zeros or all ones.

Everything and the Kitchen

Everything and the Kitchen

I’m not vouching that my Verilog code is 100% correct, especially given that it’s based on my understanding of some conflicting/incomplete data. It’s just nice to know that it has the right problems. It’s the good kind of bad, the Powerglove kind of bad.

As a side note, the Pokey datasheet and the De Re Atari chapter (7) on the Pokey contradict each other. De Re shows every distortion setting going through a divide-by-2, while the Pokey datasheet shows that some configurations, in fact, do not divide by 2. I believe the datasheet is correct in this case, though the block diagram in De Re Atari is useful for getting a general idea of the structure. The divide-by-2 settings just seem to mean “run through a T flip-flop.”

2 Responses to “Pokey Oscillator Aliasing”

  1. […] This first clip plays a major scale on the 6 different wave settings. I’m running a Kenton Pro Solo into the pitch CV input on channel 1. A Doepfer A-141 VCADSR is going into the channel 1 volume CV input. The different types of noise have different amounts of pitchability. The notes that sound like they’re missing in a couple spots are a side-effect of how the Atari chip generates noise. There’s a little more info about why it happens in this post. […]