Skrasoft Dev Blog

I’ve been making hardware changes to the Pokey module so that it can actually be manufactured. Yesterday evening I took a break to write some more Verilog FPGA code for the Pokey controller. The previous test was to write to the Pokey as often as possible, which came out to 1.79 million times per second. This test added a finished start-up routine and tweaks frequency/volume registers to check for glitches.

Listen Here

It is just a simple test. The volume is modulated by a digital triangle wave, and the pitch is modulated by a slower digital triangle wave. Everything works just as expected. There is a lot more stuff I need to port from the microprocessor into Verilog, but it’s going faster than I originally expected. I probably won’t be using dsPIC chips for audio projects anymore after finding out how much more can be done with an FPGA.

In other news, my company is now official. The new name has a better ring to it than “skrasoft,” but I’ll save it for when this module goes on sale. I’m working as fast as I can to start manufacturing without sacrificing any of the features. There are several as-of-yet-unmentioned new features in the FPGA version of the module.

For those who missed it, I posted a test video of the old microcontroller-based module on Vimeo here:

http://www.vimeo.com/9258219

This entry was posted on Sunday, February 21st, 2010 at 5:46 pm and is filed under Modular Synths, POKEY (Atari). You can follow any responses to this entry through the RSS 2.0 feed. You can leave a response, or trackback from your own site.